The present invention relates generally to semiconductor manufacture and, more specifically, to alignment of wafers within lithography tools.
In the manufacture of semiconductors, circuitry patterns are commonly transferred by lithography to multiple chips on a single semiconductor wafer. The lithography process generally comprises coating the wafer with a photoresist, exposing the photoresist in a pattern corresponding to the circuitry pattern desired, and developing the wafer to remove the photoresist in the exposed areas. Further processing, such as etching steps, may then follow using the patterned photoresist as a mask.
Because of the submicron-level resolution of the circuitry patterns and the constant drive to produce quality products with zero defects, the importance of aligning semiconductor wafers properly on the lithography tools is increasing. In an exemplary lithography configuration 200, as shown schematically in FIG. 8, each semiconductor wafer 202 is handled by a track system 204 that performs the step of coating the wafer with photoresist and then delivers the coated wafer to a lithography tool 206 at a pickup-dismount location 210. Track system 204 typically uses a robot 212 to transfer wafer 202. After wafer 202 is delivered by robot 212 of track system 204, a robotic component of lithography tool 206, such as a stepper robot 214, typically picks up the wafer 202 and takes it to a pre-aligner 216, where the center of the wafer 202 is determined. From the pre-aligner 216, the wafer 202 travels to the exposure chuck (not shown), where the wafer 202 is precisely loaded for alignment and exposure.
The transfer of wafer 202 from one robot to the other at pickup-dismount location 210 is critical, because the wafer 202 must be perfectly aligned at each step of the process. If the robot 212 of the track system 204 somehow becomes misaligned with the stepper robot 214 of the lithography tool 206, then the placement of wafer 202 within capture range of pre-aligner 216 (a range, for example a xc2x14 mmxc3x97xc2x14 mm window, within which the wafer center must be located for the wafer 202 to be further processed correctly) may be out-of-tolerance, potentially affecting final product quality. Therefore, the alignment of the robots 212, 214 with one other at pickup-dismount location 210 must be periodically re-calibrated.
Wafer-handling robots are generally of two types: edge-handling robots that handle the wafer from the edges, and center-handling robots that handle the wafer from the center. Stepper robots are almost exclusively center-handling robots, whereas track robots may generally be edge-handling or center-handling robots. Edge-handling robots are typically aligned to a wafer center position, whereas center-handling robots are typically aligned to a wafer edge position.
Referring now to FIG. 1, there is shown a tilt-plate assembly 10. Tilt-plate assembly 10 is mounted to the lithography tool (not shown in FIG. 1) by placement of alignment pegs 20 in corresponding indents (not shown) in the tool. Tilt-plate assembly 10 has an upper side edge 66 and a lower side edge 68. Tilt-plate assembly 10 is typically held in place by a tensioned cross-piece 22 inserted through a hole 24 and positioned crosswise within an indent 26. The track system robot (not shown) typically places the wafer (not shown) on tilt-plate assembly 10 with its underside touching only the tool balls on the tooling arms 14 and the tooling post 16 that extend from the tilt-plate assembly 10.
The lithography tool robot (not shown) then picks up the wafer from tilt-plate assembly 10 for further processing. A known method of calibrating the alignment of the respective robots with respect to wafer placement on the tilt-plate assembly 10 is to draw an arc on each robotic arm in the position where the edge of the wafer should be located when handled by that robot. Misalignment of the wafer edge with respect to the arc drawn on the robot arm indicates misalignment of the robots. To recalibrate, the robot positions are then adjusted by trial and error until the arcs and edges are aligned correctly. This process is time-consuming and not readily repeatable because there is no fixed reference point for both robots.
Thus, there is a need in the industry for a wafer alignment jig for a wafer-handling system that allows fast, repeatable calibration of the alignment of wafer-handling systems with one another.
To meet this and other needs, and in view of its purposes, the present invention provides a jig for aligning a wafer-handling system calibration location, such as a wafer pickup-dismount location, with respect to a wafer-processing tool. The jig comprises an alignment fixture adapted to be repeatably mounted on the tool and having one or more edge stops. The jig may further comprise an edge-to-center locator adapted to be mounted on the aunt fixture and having a peripheral edge and a center marker. The center marker identifies the precise center of the calibration location when the edge-to-center locator peripheral edge is positioned in contact with the one or more alignment fixture edge stops.
The present invention further comprises a method of aligning a wafer-handling system in a calibration location with respect to a wafer-processing tool. The method comprises the step of (a) mounting a pre-calibrated jig to the tool in the calibration location, the jig comprising an alignment fixture having one or more edge stops. Then, in step (b), a wafer is placed in the calibration location by the wafer-handling system. Next, in step (c), the alignment of the wafer with the alignment fixture is evaluated and, in step (d), the wafer-handling system is adjusted. Steps (b) through (d) are repeated as necessary, in step (e), until the wafer is placed in step (b) so that the wafer is considered aligned with the alignment fixture in step (c).
Before step (a), the jig may be pre-calibrated by (i) mounting the fixture to the tool in the calibration location; (ii) placing a wafer in the calibration location with the wafer-handling system, the wafer having been pre-aligned to the wafer-handling system by a sequentially adjacent processing tool; (iii) adjusting the one or more alignment fixture edge stops to be positioned in contact with the wafer peripheral edge; and (iv) fixing the one or more edge stops in such position.
The calibration location may be a wafer pickup-dismount location for more than one wafer-handling system, in which case the method comprises carrying out steps (a) through (e) for a first wafer-handling system, and then repeating steps (a) through (e) for additional wafer-handling systems until all the systems have been calibrated.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.